Parallel Computation of Constraints and Jog Points Using Waves in Layout Compaction Fawaz S. Al-Anzi and Khaled M. Al-Zamel
Abstract
	A new fast parallel constraint generation and jog introduction algorithm is presented for VLSI compaction. The algorithm is to be used to create constraints and specify jog points prior to every homotopic compaction step. It has a constant time complexity, O(1), per compaction step, using waves on a regular two-dimensional systolic array. The algorithm's properties such as linear space and constant time complexities, make it suitable for homotopic layout compaction.

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